Transfluxor storage matrix



Dec; 17, 1968 D. s. RIDLER ET AL 3,417,383

TRANSFLUXOR STORAGE MATRIX Original Filed Sept. 8, 1959 '7 Sheets-Sheet1 Inventor D S RIDLFR-R. GEORGE- Dec. 17, 1968 D. S. RIDLER ET ALTRANSFLUXOR STORAGE MATRIX Original Filed Sept. 8, 1959 7 Sheets-Sheet z}ow PW sw 49- Inventor D .S .RIDLER-R .GmRGE- J A W. BUTCHER- R.KITAJEWSKI y Dec. 17, 1968 s, RIDLER ET AL 3,417,383

TRANSFLUXOR STORAGE MATRIX Original Filed Sept. 8, 1959 '7 Sheets-Sheet3 I nventor D RIDER-R .GFORGF- J. A AT-BUTCHER- B R.KITAJE?ISKI Atlorney Dec. 17, 1968 0.5. RIDLER ET AL 3,417,383

TRANSFLUXOR STORAGE MATRIX Original Filed Sept. 8, 1959 7 Sheets-Sheet 4HGJO.

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y RXTAJFWSKI A Home y Dec. 17, 1968 s. RlDLER ET AL TRANSFLUXOR STORAGEMATRIX 7 Sheets-Sheet 5 Original Filed Sept. 8

Dec. 17, 1968 D. s. RIDLER ET AL v 3,417,383

TRANSFLUXOR STORAGE MATRIX Original Filed Sept. 8, 1959 7 Sheets-Sheet 6D .5 .RIDLER-R GEORGE- J.A.W.BUTCHER- R. KITAJ'FTYISKI y A Home y 1958D. s. RIDLER ET AL 3,417,383

TRANSFLUXOR STORAGE MATRIX Original Filed Sept. 8, 1959 7 Sheets-Sheet'7 H616. V sw Inventor [1.5 .RIDLER-R .GEORGY- J. A. W.BUTCHF|R- I T.LEWIS. By R I 1 KI A Home y United States Patent 3,417,383 TRANSFLUXORSTORAGE MATRIX Desmond Sydney Ridler, Roger George, John Anthony WeeksButcher, and Ryszard Kitajewski, London, England, assignors toInternational Standard Electric Corporation, New York, N.Y., acorporation of Delaware Continuation of application Ser. No. 838,727,Sept. 8, 1959. This application May 20, 1964, Ser. No. 371,868

Claims priority, application Great Britain, Sept. 15, 1958,

2 Claims. (Cl. 340-174) ABSTRACT OF THE DISCLOSURE A coordinate array ofrows and columns of ferromagnetic units are provided for the storage ofintelligence. Each unit comprises a piece of ferromagnetic materialhaving a substantially rectangular hysteresis loop and having four holesto form two storage cells and two reading cells.

Intelligence storage equipment The present invention relates tointelligence storage equipment, and especially to such equipment inwhich intelligence is stored in any array of ferromagnetic storagecells. The present application is a continuation of our earlierapplication Ser. No. 838,727, filed Sept. 8, 1959, now abandoned, and isentitled to the benefit of that filing date.

Each cell in such an array is formed of a ferromagnetic material havinga substantially rectangular hysteresis loop, i.e. of a so-calledsquare-loop material. An element of intelligence is stored in one of thecells by setting that cell to either one of its two remanent conditions,dependent on which of two conditions, referred to as 0 or 1, is to bestored. In the majority of such arrays, when reading the stored data itis necessary to reset the cell or cells to be read to the 0 condition. Acell gives a relatively large output if this resetting operation droveit from it 1 condition to its 0 condition and little or no output if itwas already in its 0 condition.

Such arrangements have the disadvantage that reading destroys the storedintelligence, so that if this intelligence is required to be retainedafter read-out has occurred, it is necessary for it to be re-recordedinto the appropriate cell or cells.

The present invention avoids this disadvantage by the provision of anarrangement in which read-out can be effected without destroying thestored intelligence.

According to the present invention there is provided a ferromagneticunit such as may be used in intelligence storage equipment, in which apiece of a ferromagnetic material having a substantially rectangularhysteresis loop has a plurality of holes in it, the material surroundingeach said hole forming one cell, in which at least one of said cells isa storage cell which can be set to either one of its two stable remanentstates to store intelligence and is threaded by an output wire, in whichat least one of said cells other than the cell or cells used to storeintelligence is a reading cell and is threaded by a reading wire, inwhich in response to the application of an electrical pulse to thereading wire threading said reading cell or cells an output occurs onthe output wire threading said storage cell or cells the nature of whichindicates the intelligence stored in said storage cell or cells, and inwhich said cells are so dimensioned and 50 located with respect to eachother, and the characteristics of said pulse are such, that the readingof said storage cell or cells does not destroy the intelligence storedtherein.

The present invention will now be described with reference to theaccompanying drawings, in which:

FIGURE 1 shows one form of storage unit according to the invention, inwhich three storage cells, each formed by the material surrounding ahole in a block or plate of a square-loop material, are used for oneelement of intelligence.

FIGURES 2a and 2b are diagrams explanatory of the operation of anarrangement such as that of FIGURE 1.

FIGURE 3 is a typical hysteresis loop for a square-loop material such asis used in the arrangement of FIGURE 1.

FIGURES 4a and 4b are further explanatory diagrams.

FIGURE 5 shows in more detail part of the hysteresis loop shown inFIGURE 3.

FIGURE 6 shows an alternative storage unit according to the presentinvention, but also using three cells for one element.

FIGURES 7a and 7b are diagrams explanatory of the operation of thestorage unit shown in FIGURE 6.

FIGURE 8 shows a co-ordinate memory array having a capacity for 9elements of intelligence in 3 rows of 3 elements each. Each element usesa single unit such as that of FIGURE 1, and each row of cells is formedby a strip of square-loop material in which are a number of holes.

FIGURE 9 shows an array similar to that of FIGURE 8, but using a singleperforated plate of square-loop material.

FIGURE 10 is an array similar to those of FIGURES 8 and 9, but in whichfor each element of intelligence there is a separate memory unitconsisting of a piece of a square-loop material having three holes.

FIGURE 11 is an array using for each element a separate three-hole unit,as in FIGURE 10, but in which each unit is arranged in the manner shownin FIGURE 6.

FIGURE 12 is a perforated plate using a development of the arrangementof FIGURE 6.

FIGURE 13 is a multi-plane array which represents a further developmentof the arrangement of FIGURE 6.

FIGURE 14 shows a coordinate memory array which is generally similar tothat shown in FIGURE 10, but in which each memory unit is a disc of asquare-loop material along whose diameter are three holes.

FIGURE 15 is an array which is generally similar to that of FIGURE 11but in which each memory unit is a disc of a square-loop material alongwhose diameter are three holes.

FIGURE 16 shows schematically a four-hole memory unit.

FIGURE 17 shows a 3 x 3 matrix using units such as that of FIGURE 16.

FIGURE 18 shows another wiring arrangement using a four-hole disc but inwhich only three of the holes are used.

General introduction A coordinate memory matrix according to the presentinvention uses for each bit, i.e. each element which can be set toeither one of two conditions 1 or 0, three individual cells. These cellsare each formed by the material surrounding a hole in a plate or blockof a squareloop ferromagnetic material. There are two alternativearrangements using three cells per bit.

In the first arrangement there is a group of three holes in the plate orblock, the material which surrounds a hole forming one of the cells. Onecase in which the three holes are in a straight line the outer two cellsare used for storage while the inner cell is used for sensing the storeddata. To store data the two cells are set oppositely: thus it will beassumed that to store 0 they are set to SN while to store 1 they are setto NS, the two remanence states being referred to as S and Nrespectively. To read the stored element, a pulse is applied to areading wire which passes through the central hole of the three. Theflux which this pulse induces in the material surrounding the centralhole interacts with the flux due to the remanence state of the twostorage cells in such a way as to produce, on a wire threading thestorage cells, a pulse which coincides with the leading edge of thepulse on the reading wire and a pulse which coincides with the trailingedge of the pulse on the reading wire. These two pulses of oppositepolarity and the order in which they occur i.e. positive-negative ornegative-positive, indicates whether or 1 is stored. The read-outobtained in this way is non-destructive, i.e. it does not destroy thestored intelligence.

The holes need not be in a straight line, but could be in a. triangularformation provided that flux induced around the central hole caninteract with fluxes around the other holes, and that there issubstantially no interaction between the fluxes around the other twoholes.

The second arrangement is, in eifect, an inversion of the first in that,of the three cells used for one bit, the central cell is used forstorage and the outer two are threaded by the sensing wire. The centralcell is set, in the usual way, to its N or S state to representwhichever of the two possible conditions 1, or 0, is to be stored. Whena pulse is applied to the reading wire, which threads the two outercells in opposite directions, the fluxes produced thereby interact withthe flux due to stored bit. As before a pulse pair occurs on a wirewhich threads the central cell, and the order of these pulses,positive-negative or negative-positive, indicates the nature of thestored element. This arrangement has an advantage over the arrangementbriefly described above that in certain cases reading cells can each becommon to two or more elements. Hence for n storage cells, there is arow of (2+1) equally-spaced cells, each formed by the materialsurrounding a hole in a plate or block of square-loop material. Thereading wire then threads all odd-numbered cells, the even-numberedcells being used for storage.

A convenient storage unit for the above two arrangements is a small discof a square-loop ferrite drilled with three holes. The material whichsurrounds those three holes thus forms the three cells referred to inthe preceding paragraphs. These discs can be wired in a suitable mannerto form storage matrices, as will be described later.

Another form of storage unit which can be used for non-destructivelyread matrices is a disc of a square-loop material drilled with fourholes in a square formation. The material which surrounds these holesthus forms four storage cells. Such units can be used in a matrixwherein the two holes per bit technique of our Patent specification No.796,488 (Ridler et al. -2) is used, in which case one pair ofdiagonally-opposed cells is used as the storage cells and the other pairas the reading cells.

Such a four-hole disc can also be used as a unit of a matrix usingeither of the three hole per bit techniques described above, in whichcase one hole is. not used.

Operation of the first arrangement (FIGURES 15) The arrangement whereinthere are two storage cells with a reading cell therebetween will now bedescribed with reference to FIGURE 1. This shows a plate P ofsquare-loop ferromagnetic material which has three holes 1, 2 and 3arranged in a straight line. As already indicated, the holes could bearranged in a triangular configuration. The material surrounding theholes 1 and 3 forms the two storage cells, which are threaded by a rowwire RW and a column wire CW, While the material surrounding the centralhole 2 forms the reading cell, which is threaded by a reading wire SW.It will be noted that both wires pass through the hole (cell) 1 from topto bottom, and through the hole (cell) 3 from bottom to top. To write 1in the pair of storage cells, positive pulses of ampliude 1/2, I beingthe amplitude necesary to change a cells state from N to S or S to N,are applied simultaneously to the wires RW and CW. The direction whichthe wires pass through the cell 1 is such that a positive drive of Isets the cell 1 to N (if not already there), while since the wires passthrough cell 3 in the opposite direction the same drive sets cell 3 to S(if not already there). Hence for a coincident positive drive as justdescribed, cell 1 is set to N while cell 3 is set to S, so that thecondition of cells 1 and 3 for 1 stored is NS. Flux is assumed to beclockwise for a cell set to N and anti-clockwise for a cell set to S, sothat the solid arrows in FIGURE 1 represent the flux conditions for 1stored.

To write 0, negative pulses of amplitude L/2 are applied simultaneouslyto the wires RW and CW, and the effect of these is to set the cells 1and 3 to S and N respectively, i.e. the condition for 0 stored is SN.The flux conditions for 0 stored are indicated by the chain-dottedarrows.

From the above description it will be seen that, Whatever the conditionof the two storage cells before the two half-write pulses occur, thecoincidence of positive half-write pulses on RW and CW sets the storagecells to NS, while the coincidence of negative half-write pulses on RWand CW sets the storage cells to SN.

FIGURE 2a, simplified from FIGURE 1, shows three holes in a piece ofsquare-loop material, with a 1 bit stored in the two outer cells. Thetwo arrows show the flux state for 1 stored-clockwise in the left-handcell and anti-clockwise in the right-hand cell. SW, as in FIGURE 1, isthe reading wire, while OW, which threads the two storage cells inopposite directions, is an output wire. In the so-called direct-access"method of operating a co-ordinate memory matrix, which will be describedlater, OW could be the column wire for the unit shown. The reading pulseproduces the pulse pair shown to the right of the piece of square-loopmaterial. That is, a positive pulse on the leading edge of the pulse onSW and a negative pulse on the trailing edge of the pulse on SW.

FIGURE 2b is a similar sketch for the condition where O is written inthe two storage cells. Hence it will be seen that a negative pulse isobtained on the leading edge of the pulse on SW and a positive pulse onthe trailing edge thereof.

This method of reading stored information does not destroy theinformation. Further, as will be seen later, the polarity of the pulsesproduced on the output wire is dependent only on the direction of theremanent flux caused by the stored information. It is independent of thedirection of the pulse current in the reading Wire.

One three-hole storage element which was tested had three holes eachhaving a nominal diameter of 20 mils, the holes being spaced apart(center-to-center distance) 35 mils. The full-write current value was280 ma., i.e. half-write currents of 140 ma. The value of the readingcurrent was ma., which gave output voltages in the range 50-100 mv. Therise times of the output pulses follow very closely the rise and falltimes of the reading pulses, and each output pulse is of shortduration-about 100 milli-microsecs. The separation between the twopulses generated by a pulse on the reading wire is, of course, dependenton the length of the reading wire pulse. If this pulse is very narrow,then a complete read-out can be made to occupy about 200rnilli-rnicrosecs.

The spacing of the three holes in the plate of squareloop material, andthe radial penetrations of the stored remanent flux around the two outerholes are such that, in the absence of a reading pulse on the wire SWthrough the central hole, the remanent magnetic field in between the twoouter holes is essentially unidirectional-see the arrows showing theflux direction in FIGURES 1 and 2a. When a reading pulse is applied tothe Wire SW, the flux which it induces around the central hole increasesthe field on one side of the central hole and decreases the field on theother side thereof. It is this interaction which enables thenon-destructive read-out described above to be obtained. The theory ofoperation of the method of non-destructive read-out described above willnow be discussed with reference to FIGURES 4 and 5. It is believed thatthis theory is substantially correct.

In FIGURE 4a, in which the wires are omitted in the interest of clarity,the dotted arrows show the flux conditions of the outer holes for 1stored and the solid arrows show the flux due to a sensing pulse. Thisshows that, with the pulse direction assumed, the fluxes oppose on theleft-hand side of the central hole and augment on the right-hand side.FIGURE 4b shows the corresponding fluxes for stored, in which the fluxesaugment on the left-hand side of the central hole and oppose on therighthand side thereof.

The partial hysteresis curve of FIGURE 5 will now be considered, itbeing assumed that the two outer holes have been set to the SNcondition, i.e. 0 stored. The material between the two storage holes istherefore at the remanence point A, and the stored flux value is +B Whena reading pulse is applied to the wire which threads the central hole,the flux distribution is disturbed, and as can be seen also from FIGURE4b, the magneto-motive force induced by the reading current assists theflux build up to left of the central hole and inhibits, and to someextent, reverses it to the right of the central hole.

Assuming that the magneto-motive force at a radius r from the centralhole is 6H, then at this radius the magnetic state of the material tothe left of the central hole is represented by point B on the hysteresisloop. This represents a change of flux of +5B Similarly the magneticstate of the material at this radius on the right-hand side of thecentral hole is represented by point C, which rep resents a flux changeof 6B Now the slope of the hori zontal section of the hysteresischaracteristics of the square-loop material in the direction of positivemagnetization +H is less than the slope in the direction of negativemagnetization H. Therefore 6B is greater than 6B so that the readingpulse causes a change in the total flux contained in the materialbetween the two outer holes. Since the output wire is linked to the fluxbetween the two outer holes, an e.m.f. is induced thereinto when thereading pulse occurs. As already indicated, the direction of changeproduced is dependent on the stored intelligence, so that for 1 theoutput on the leading edge of the reading pulse is positive while for 0it is negative. When the reading pulse ends the field pattern reverts tothe original remanent state, which means that a second output occurs atthe end of the reading pulse. This output is opposite in polarity to theoutput at the commencement of the reading pulse.

If the reading pulse has a sharp (i.e. quick-rising) leading edge and aslow-falling trailing edge, for instance, if the reading pulse is ofsaw-tooth shape, then the leading edge pulse produced on the output wireis a sharp pulse while the trailing edge pulse is of lower amplitude butgreater duration. With such an output due to a reading pulse there islittle possibility of misinterpreting an output which has been subjectto delays due to a relatively long output wire. Such delays mightotherwise be troublesome even if the wire is properly terminated.Further, the sensing of the output can be effected with differentialsquaring amplifiers, eliminating the need to use a threshold method todistinguish between a 1 and a 0 output. This latter is of specialimportance where output levels are low and where noise is present. Thusby using such a read pulse the detection of the read output might beamplified. It will be apparent that if the read puse has a slow-risingleading edge but a sharp trailing edge, then the output pulse pair willbe a long shallow pulse on the leading edge and a larger but shorterpulse on the trailing edge. This latter may in certain cases bepreferable to the use of a reading pulse with a sharp leading edge and ashallow trailing edge.

The energy needed to move the remanent point from position A to positionB or C is small, provided that the value of 6H does not approach theknee of the hysteresis loop. This means, in eifect, that no domain wallmovement occurs. Since it is the latter which usually restricts thespeed at which a square-loop material can be switched, the readingprocess described above can be very fast.

Operation of the second arrangement (FIGURES 6 and 7) This, as alreadymentioned, is, in effect, the inverse of the arrangement alreadydescribed. The geometrical arrangement of the holes in the piece ofsquare-loop material can be the same as used in the earlier-describedarrangement. The cental hole, or to be more precise, the ferromagneticmaterial which surrounds that hole, is used as a normal single storagecell, being threaded, in FIG- URE 6, by a row wire RW, a column wire CWand an output wire OW. As will be seen later, when the so-called directaccess selection method is used the column wires can also be used asoutput wires. The reading wire SW passes through the two outer holes, asshown in FIG- URE 6.

The theory by which the non-destructive reading occurs is generallysimilar to that for the arrangement already described, the flux patternsbeing shown in FIG- URE 7. Thus in FIGURE 7a, which shows by the dottedarrows the direction of flux due to a stored 1 bit and by the solidarrows the flux due to a reading pulse (since the reading wire threadsthe two outer holes in opposite direction), it can be seen that thefluxes augment on the left and oppose on the right. FIGURE 7b is thecorresponding diagram for 0 stored. Hence it will be seen that theeffect of the reading pulse is exactly the same as it was in thepreviously described arrangement.

This arrangement has the advantage compared with that described firstthat it allows for simpler wiring because the selection wires each onlypass through one cell of the storage unit, instead of two in the case ofthe first arrangement. Further, as will be seen below, reading cells canbe shared between two adjacent storage cells. A sawtooth reading pulsecan be used in this arrangement in the same manner as in thefirst-described arrangement.

M emol'y matrices using the above principles FIGURE 8 showsschematically a 3 x 3 memory matrix in which each element is athree-hole unit wherein the two outer holes form the storage cells andthe central hole forms the reading cell. The rows of the matrix eachconsist of a block or strip of a square-loop material, preferably aferrite, having a line of holes arranged as shown. Three row wires RWl,RW2 and RW3, three column wires CW1, CW2 and CW3, and three readingwires SW1, SW2 and SW3 are shown. As will be seen, the column wiresfunction also as output wires. Writing uses the coincident currenttechnique, and it is assumed that the direct-access method is used. Inthis method each row of storage units contains a single word, i.e. asingle group of related binary bits such as a number. It is assumed thatall storage units are initially in the 0 condition, i.e. the left-handcell in condition S and the right hand cell in condition N.

When a word is to be written in a row, a positive pulse of half-writeamplitude is applied to that rows row wire, and positive half-writepulses applied to the column wires of units to be set to 1 and negativehalfwrite pulses to column wires of units to be set to 0. The result ofthis is to set the storage cell pairs whose row and column wires bothcarry positive pulses to the NS condition, and to leave the cell pairswhose row and column wires carry a positive and a negative pulse at 0.

To read the word in a row, a reading pulse is applied to its readingwire, e.g. SW1, which threads the central holes of each trio of holes ofthe wanted row. This produces a pulse pair on each column wire, eachpulse pair consisting as already described of two pulses of oppositepolarity. It is assumed that a positive pulse followed by a negativepulse represents a 1 bit, while a negative pulse followed by a positivepulse represents a 0 bit. Each column wire is connected to two circuits,one being an input circuit to which a positive or a negative half-writepulse can be applied (as already described), while the other is adetector circuit of well-known type which is enabled coincidentally witha reading pulse and which can discriminate between the two types ofpulse pair.

When a new word is to be written, it is necessary to reset all storageunits of the appropriate row to 0, which is done by applying negativepulses of full write amplitude to the row Wire, setting all storage cellpairs to the SN condition. Alternatively, it is possible to achieve thesame effect by applying negative half-write pulses to all column wires,and to the row wire of the row in which the new word is to be written.

FIGURE 9 shows a plate of square-loop material, the wiring being thesame as that in the array of FIGURE 8. The broken lines represent wiringon the reverse side of the plate. Some at least of the wiring showncould be produced by printed circuit techniques.

FIGURE shows an array similar to those of FIG- URES 8 and 9, but inwhich each bit uses for its storage a unit formed of a small piece of asquare-loop material having three holes disposed in a manner similar tothat already described, and hence forming three cells. Such anarrangement may be preferred to the arrangements of FIGURES 8 and 9 wheneconomy of the square-loop material is of significance.

FIGURE 14 shows an array which is similar to the array of FIGURE 10, butin which each storage unit is a disc of a square-loop ferrite such asthat sold under our designation SFll (SP is an abbreviation of ourRegistered Trade Mark Stanferrite), which has a thickness of 40 mils, adiameter of 115 mils and has a line of three holes along its diameter.These holes have nominal diameter of 25 mils and are spaced(center-to-center) by 35 mils. Since the wiring is the same as that ofFIGURE 10 no further description of this array is necessary.

FIGURE 11 shows another array using individual units each with threeholes, but in Which the second method is used. That is, the materialsurrounding the central hole is the storage cell, while the readingwires each thread outer pairs of holes of each trio. The operation ofthis array is similar to that of those of FIGURES 8, 9 and 10.

FIGURE shows an array similar to the array of FIGURE 11, but in whicheach storage unit is a disc such as that used in the array of FIGURE 15.The wiring is the same as that of FIGURE 11 so no further description ofthis array is necessary.

In FIGURE 12 there is shown a plate of a square-loop material using thethree hole element in which the material surrounding the central hole isthe storage cell. This exploits the fact already mentioned that theoutput obtained when a storage element is read is independent of thepolarity of the pulse applied to the reading wire. As a consequence ofthis, the reading holes can be shared between adjacent storage elementsin the same row, or, of course, in the same column. This reduces thenumber of holes required. In fact, for a row of n storage cells there isrequired (Zn-H) holes, of which 11 provide the storage cells while (n+1)supply the reading holes.

The array shown is a 4 x 4 memory array in which there are four columnwires CW1 to CW4, four row wires RWl, to RW4, and four reading wires SW1to SW4. The arrangement of the wiring will be clear from a perusal ofFIGURE 12.

Writing uses the same techniques as have already been described.Non-destructive read-out is effected by applying a reading pulse to thereading wire of the row from which intelligence is to be read. This, asusual, causes read-out on the column wires of all cells of the row tothe reading winding of which a pulse is applied. If the content of onecell only of the row is to be read, then the detector circuit for thatcells column wire is the only one which is enabled at the same time asthe reading pulse is applied.

The advantage of this form of matrix over those already described is, asalready indicated, that there is a great reduction in the number ofholes to be threaded. For instance, in a typical computer applicationeach row of the matrix holds a single word, and the word length indigital computers varies from 28 to 40 bits. For a word length of 32bits, it will be seen that a row only needs 65 holes, as compared with96 holes when using the other forms of matrix described herein. Thismethod of wiring is, as can be seen from FIGURE 12 very convenient wherethe wiring is printed onto the surface of a ferrite plate.

Where the memory is formed by a stack of memory planes a furtherreduction in the number of holes is possible. In this case a row ofreading holes, consisting of (n+1) holes is shared by two adjacent rowseach of n storage holes. Hence when a reading pulse is applied to thewire which threads such a row of holes, the pulses induced on the columnwires will be meaningless because they represent the combined read-outfrom two rows. However, each storage hole in a plane has its own outputwire which passes through correspondinglynumbered holes in all planes.Thus to read the contents of a given row in one plane, a reading pulseis applied to the reading winding for the wanted row, and the detectorcircuits for the output wires which thread the cells of that row in allplanes are enabled. In such a case, all reading wires of the same memoryplane could be connected in series. For a memory plane with in rows,each of n storage cells, this requires m/2 rows of reading holes, eachrow consisting of (n+1) holes. Hence the total number of holes on theplane is mat-{ g (n+1) This corresponds to approximately one and a halfholes per bit of stored intelligence.

FIGURE 13 shows a 32 bit array, formed by two 4 X 4 memory planesconstructed on this principle. In this array each plane contains rows ofholes forming storage cells, and each row has associated with it a rowof reading cells, which it shares with an adjacent row. Thus the holeswhich form one storage unit are arranged as in the inset to FIGURE 13.

Each storage cell is threaded by the appropriate row and column wires ofthe wires of its own plane, and also by an output wire passing throughthe correspondinglynurnbered cells in all planes. Of these, 4 are shown,these being OW33, passing through the third cell in the third row of allplanes OW34, passing through the fourth cell in the third row of allplanes, OVV43, passing through the third cell in the fourth row of allplanes and OW44, passing through the fourth cell in the fourth rows.

Writing in such an array is effected by selecting the appropriate rowand column wires of the wanted plane and energizing them in a mannerappropriate to the intelligence to be written. As in the case of all thearrays which have hitherto been described, it is necessary to reset thelocation in which writing is to be performed to the 0 condition beforethe new intelligence is written.

Reading is effected by energizing the reading wire for the wanted row bya reading pulse, e.g. to read the second row in the second plane thereading Wire SW12 for the first and second rows of that plane is pulsed.The resulting outputs on the column wires of the second plane aremeaningless because both rows 1 and 2 are read, and so this read-out isignored. However, pulse pairs which represent the contents of the wantedrow appear on the output wires (not shown) which pass through the cellsof the wanted row. Hence at the same time as the wanted rows readingwire is pulsed, the detector devices associated with the appropriate setof row output wires are enabled. Hence the wanted data is read. Asbefore, the read-out is non-destructive. Where the state of a singlememory cell is to be read, of course, only a single one of the detectordevices of the output wires is enabled. Hence it is possible to read anyone or more elements of any one of the rows of storage cells in anyoneof the planes of the array.

With this system it would be possible for all reading wires of a singleplane to be connected together.

The memory arrays described above which use a single strip offerromagnetic material for a whole row of elements, or a single platefor a number of rows have the disadvantage as compared with the arrayssuch as FIG- URES 10, 11, 14 and 15 that greater control of operatingconditions is necessary than in the case for the arrays such as those ofFIGURES 10, ll, 14 and 15. However, in certain cases the advantages ofthe strip and plate arrangements mentioned in the preceding descriptionmay compensate for these disadvantages.

Operation of the four-hole unit (FIGURE 16) This resembles the techniqueof the second method of operation described above, i.e. where the pairof reading cells are associated with a single storage cell, but with theextension that two cells are used to store data. FIG- URE 16 shows thearrangement where the unit is used as part of a matrix in which the twocells per bit technique of Patent No. 796,488, above mentioned, is used.Data storage is effected in the same manner as has been described forthe matrix of FIGURE 11. To read the stored data, a pulse is applied tothe reading wire SW. If the pulse is of rectangular shape, then pulsepairs such as shown in FIGURES 2a and 2b are produced for 1 stored and 0stored respectively. However, the preferred method is to use a saw-toothpulse with a sharp leading edge, when the trailing edge pulses shown inFIGURE 2 are replaced by longer and shallower pulses. As alreadyexplained the use of such a reading pulse leads to advantages inoperation.

FIGURE 17 shows a 3 x 3 matrix using units such as that of FIGURE 16. Inview of the previous description it is not believed necessary todescribe this figure in detail. The material used for the discs is thesquare-looped ferrite sold under the designation SP3, each disc having athickness of 40 mils and a diameter of 100 mils. The four holes, whichare arranged in a square are each 27 mils from the center of the discand have nominal diameters of 25 mils.

In this matrix, to write a word into one row, a positive pulse of fullwrite amplitude is applied to its row wire, e.g. to RWl, and positivehalf-write pulses are applied to the column wires which thread units tobe set to 1 and negative half-write pulses are applied to other columnwires. These pulses are applied to the left-hand end of the columnwires. Reading uses a pulse on the appropriate read wire, e.g. SW1,which is of saw-tooth form, with a sharp leading edge. The column wires,which also act as output wires, then have pulse pairs consisting of asharp positive pulse followed by a longer, shallower, negative pulse for1 read, and a sharp negative pulse followed by a longer, shallower,positive pulse for 0 read. Cancellation of the data in one row is byapplying thereto .a negative pulse of 1 /2 times the full writeamplitude.

FIGURE 18, represents a single four-hole disc used as one unit in thesecond three-hole method described above. SW is the reading wire, OW theoutput wire and the other two wires STW and CW represent the setting andthe cancelling wires.

While the principles of the invention have been described above inconnection with specific embodiments, and particular modificationthereof, it is to be clearly understood that this description is madeonly by way of example and not as a limitation on the scope of theinvention.

What we claim is:

1. A co-ordinate array of rows and columns of ferromagnetic units forthe storage of intelligence, in which each said unit comprises a pieceof a ferromagnetic material having a substantially rectangularhysteresis loop and having four holes arranged in a square, in which thematerial which surrounds the holes in each said piece forms two storagecells and two reading cells, the two storage cells being one pair ofdiagonally opposed cells and the two reading cells being the other pairof diagonally opposed cells, in which a number of row wires areprovided, each threading the storage cells of all of the ferromagneticunits of its array and passing through the two storage cells of the sameunit in the same direction, in which a number of column wires areprovided, each threading the storage cells of all of the ferromagneticunits of its column of the array and passing through the two'storagecells of the same unit in opposite directions, in which for each row ofthe array there is provided a reading wire which threads the readingcells of all of the ferromagnetic units of its row and passes throughthe two reading cells of the same unit in opposite directions, in whichto store a word in a two condition code in a row of the array a pulse ofone polarity and having the amplitude necessary to change the state of astorage cell from one to the other of its remanent states is applied tothat rows row wire, and while said pulse is present on said row Wirepulses of said one polarity and half the amplitude thereof are appliedto the column wires threading the storage cells of units to be set tostore one of said two conditions and similar half amplitude pulses ofthe other polarity are applied to the column wires threading the storagecells of units to be set to store the other of said two conditions, inwhich the result of said pulse applications in that for one condition ofsaid code one storage cell of a unit is set to its first remanent stateand the other storage cell of a unit is set to its second remanentstate, and for the other condition of said code said one storage cell isset to its second remanent state and the other storage cell is set toits first remanent state, in which to cancel the intelligence stored ina row of said array a pulse of said second polarity and whose amplitudeis one and one half times the amplitude necessary to change a storagecell from one to the other of its remanent states is applied to thatrows row wire, in which to read the intelligence stored in a row of saidarray a read pulse is applied to the read wire which threads the readingcells of the ferromagnetic units of that row, which read pulse causesoutputs of one nature to be obtained on the column wires threading thestorage cells of units of that row which are storing said one of saidtwo conditions and output of a different nature to be obtained on thecolumn wires threading the storage cells of units of that row which arestoring the other of said two conditions, and in which said cells are sodimensioned and so located with respect to each other, and thecharacteristics of said reading pulse are such, that the reading of thestate of the storage cells of the units of a row of the array does notdestroy the intelligence stored in that row.

2. A co-ordinate array as claimed in claim 1, in which each said pieceof a ferromagnetic material is a disc of a ferrite having asubstantially rectangular hysteresis loop.

References Cited UNITED STATES PATENTS 2,942,240 6/1960 Rajchman et al340174 3,093,817 6/1963 Rajchman et al, 340174 3,102,328 9/1963 Schultzet a1 340174 3,315,237 4/1967 Kallmaun 340-174 STANLEY M. URYNOWICZ,JR., Primary Examiner.

